In design of a thin film transistor (TFT) with an active pattern formed by amorphous silicon (a-Si), as a photosensitive material, the amorphous silicon can be easily irradiated by backlight to affect electrical stability of the TFT. Conventional TFT design generally adopts a conlanar structure to solve the problem, as shown in FIG. 1, a section of an active pattern 11 of a TFT 10 is disposed on a gate pattern G1, other sections are respectively disposed on a source electrode pattern S1 and a drain electrode pattern D1, the metallic gate pattern G1, source electrode pattern S1 and drain electrode pattern D1 are utilized to shade backlight, so as to prevent amorphous silicon in the active pattern 11 from illumination.
To the structure above, when the TFT 10 is electrified, a hole current can be formed in the active pattern 11, as the active pattern 11 is contacted to sidewalls of the source electrode pattern S1 and the drain electrode pattern D1 directly and convenient for conduction of the hole current, leakage current (Ioff) of the TFT 10 can be considerable. Moreover, during etching to form the source electrode pattern S1 and the drain electrode pattern D1, sidewalls of the source electrode pattern S1 and the drain electrode pattern D1 adjacent to the active pattern 11 can occur metal under cut to form an undercut angle, which leads to contact impedance of the active pattern 11 and the source electrode pattern S1 as well as the drain electrode pattern D1 to be high, resulting in insufficient charge for the TFT 10.